

puts "Start to source [info script]"

global SLR0_DPU_V3_TOP

# set_property LOC  RAMB36_X3Y25 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_l/gen_brams[0].gen_brams_first.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y26 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_l/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y27 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_l/gen_brams[2].gen_brams_last.RAMB36E2_ins]
# set_property LOC  RAMB36_X7Y29 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_r/gen_brams[0].gen_brams_first.RAMB36E2_ins]
# set_property LOC  RAMB36_X7Y30 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_r/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X7Y31 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_r/gen_brams[2].gen_brams_last.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y21 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_l/gen_brams[0].gen_brams_first.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y22 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_l/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y23 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_l/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y24 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_l/gen_brams[3].gen_brams_last.RAMB36E2_ins]
# set_property LOC  RAMB36_X1Y20 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_r/gen_brams[0].gen_brams_first.RAMB36E2_ins]
# set_property LOC  RAMB36_X1Y21 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_r/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X1Y22 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_r/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X1Y23 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_r/gen_brams[3].gen_brams_last.RAMB36E2_ins]
# set_property LOC  RAMB18_X4Y66 [get_cells $SLR0_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_9bx2k_1r1w1c_top/RAMB18E2_inst]


set_property LOC  RAMB36_X7Y24 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[0].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y25 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[0].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y26 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[0].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y27 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[0].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y22 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[1].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y23 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[1].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y24 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[1].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y25 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[1].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y22 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[2].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y23 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[2].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y24 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[2].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y25 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[2].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y20 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[3].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y21 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[3].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y22 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[3].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y23 [get_cells $SLR0_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[3].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[3].gen_brams_last.RAMB36E2_ins]


set_property LOC  RAMB36_X5Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[0].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[0].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[0].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[0].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[100].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[100].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[100].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[100].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[101].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[101].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[101].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[101].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[102].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[102].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[102].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[102].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[103].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[103].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[103].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[103].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[104].ram_18_104_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[104].ram_18_104_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y45 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[104].ram_18_104_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y46 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[104].ram_18_104_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[105].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[105].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[105].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[105].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[106].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[106].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y45 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[106].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y46 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[106].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[107].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[107].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[107].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[107].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[108].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[108].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y45 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[108].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y46 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[108].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[109].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[109].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[109].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[109].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[10].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[10].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[10].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[10].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[110].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y45 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[110].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y46 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[110].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y47 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[110].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y20 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[111].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[111].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y22 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[111].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y23 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[111].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[112].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[112].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[112].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[112].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[113].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[113].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[113].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[113].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y20 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[114].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[114].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y22 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[114].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y23 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[114].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[115].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[115].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y20 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[115].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[115].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[116].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[116].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[116].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[116].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y24 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[117].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y25 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[117].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y26 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[117].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[117].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[118].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[118].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[118].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[118].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y24 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[119].ram_18_119_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y25 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[119].ram_18_119_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y26 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[119].ram_18_119_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[119].ram_18_119_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[11].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y45 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[11].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y46 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[11].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y47 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[11].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y17 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[12].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[12].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[12].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y20 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[12].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[13].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[13].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[13].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[13].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[14].ram_18_14_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[14].ram_18_14_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[14].ram_18_14_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[14].ram_18_14_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[15].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[15].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[15].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[15].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[16].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[16].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[16].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[16].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[17].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[17].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[17].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[17].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[18].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y45 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[18].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y46 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[18].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y47 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[18].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[19].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[19].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[19].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[19].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[1].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[1].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[1].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[1].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[20].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[20].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[20].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[20].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[21].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[21].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[21].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[21].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y16 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[22].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y17 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[22].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[22].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[22].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[23].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y22 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[23].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y23 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[23].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y24 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[23].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[24].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[24].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[24].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[24].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y25 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[25].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y26 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[25].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[25].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[25].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[26].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[26].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[26].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[26].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[27].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[27].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[27].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[27].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[28].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[28].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[28].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[28].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[29].ram_18_29_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[29].ram_18_29_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[29].ram_18_29_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[29].ram_18_29_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[2].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[2].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[2].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[2].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[30].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[30].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[30].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[30].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[31].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[31].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[31].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[31].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[32].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[32].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[32].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[32].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[33].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[33].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[33].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[33].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[34].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[34].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[34].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[34].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[35].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[35].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[35].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[35].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[36].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[36].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[36].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[36].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y25 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[37].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y26 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[37].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[37].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[37].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[38].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[38].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[38].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[38].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[39].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[39].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[39].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[39].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y16 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[3].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y17 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[3].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[3].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[3].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[40].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[40].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[40].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[40].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[41].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[41].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[41].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[41].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[42].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[42].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[42].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[42].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[43].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y45 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[43].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y46 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[43].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y47 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[43].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[44].ram_18_44_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[44].ram_18_44_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y20 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[44].ram_18_44_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[44].ram_18_44_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[45].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[45].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[45].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[45].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[46].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[46].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[46].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[46].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[47].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[47].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[47].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[47].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[48].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[48].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[48].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[48].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[49].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[49].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[49].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[49].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[4].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[4].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[4].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[4].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[50].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[50].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[50].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[50].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[51].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[51].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[51].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[51].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[52].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[52].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[52].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[52].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[53].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[53].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[53].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[53].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[54].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[54].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[54].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[54].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[55].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[55].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[55].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[55].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[56].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[56].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[56].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[56].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[57].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[57].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[57].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[57].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[58].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[58].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[58].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[58].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[59].ram_18_59_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[59].ram_18_59_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[59].ram_18_59_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[59].ram_18_59_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[5].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[5].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[5].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[5].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[60].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[60].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[60].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[60].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[61].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[61].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[61].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[61].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[62].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[62].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[62].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[62].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[63].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[63].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[63].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[63].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y16 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[64].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y17 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[64].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[64].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[64].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[65].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[65].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[65].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[65].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[66].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[66].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[66].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[66].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y20 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[67].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[67].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y22 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[67].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y23 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[67].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[68].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[68].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[68].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[68].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y16 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[69].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y17 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[69].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[69].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[69].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[6].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[6].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[6].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[6].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[70].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[70].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[70].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[70].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[71].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[71].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[71].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[71].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[72].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[72].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[72].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[72].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y0 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[73].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[73].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[73].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[73].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[74].ram_18_74_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[74].ram_18_74_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[74].ram_18_74_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[74].ram_18_74_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[75].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y41 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[75].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y42 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[75].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y43 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[75].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y44 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[76].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y45 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[76].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y46 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[76].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y47 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[76].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[77].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[77].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[77].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[77].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[78].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y29 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[78].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y30 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[78].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y31 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[78].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y16 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[79].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y17 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[79].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[79].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[79].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[7].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[7].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[7].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[7].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[80].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[80].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[80].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[80].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[81].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[81].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[81].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[81].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[82].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[82].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[82].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y40 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[82].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[83].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y16 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[83].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y17 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[83].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[83].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[84].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[84].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[84].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[84].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y24 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[85].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y25 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[85].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y26 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[85].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[85].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[86].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[86].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[86].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[86].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y20 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[87].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[87].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y22 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[87].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y23 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[87].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y1 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[88].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y2 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[88].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y3 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[88].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[88].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y4 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[89].ram_18_89_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y5 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[89].ram_18_89_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y6 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[89].ram_18_89_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y7 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[89].ram_18_89_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y32 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[8].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y33 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[8].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[8].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[8].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[90].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[90].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[90].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[90].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y8 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[91].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y9 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[91].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y10 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[91].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y11 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[91].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[92].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y22 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[92].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y23 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[92].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y24 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[92].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y12 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[93].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y13 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[93].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y14 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[93].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y15 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[93].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y24 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[94].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y25 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[94].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y26 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[94].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[94].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y16 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[95].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y17 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[95].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y18 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[95].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y19 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[95].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y24 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[96].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y25 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[96].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y26 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[96].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[96].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y25 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[97].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y26 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[97].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y27 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[97].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y28 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[97].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y20 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[98].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y21 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[98].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y22 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[98].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y23 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[98].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y34 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[99].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y35 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[99].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[99].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[99].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y36 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[9].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y37 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[9].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y38 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[9].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y39 [get_cells $SLR0_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[9].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
